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Back  Course Description (By Curriculum)

Datatrain

z/OS Architecture 1.7

Duration

4 hours

Overview

Audience

Technical support personnel and senior programmers who require knowledge of z/Architecture for use in planning, problem resolution, and advanced programming techniques

Prerequisites

Completion of the z/OS Concepts and Components course and knowledge of data processing concepts

Objectives

After completing this course, the student will be able to:
• Identify the purposes of different bits in the PSW
• Identify the different interruption types
• Recognize the way supervisor routines get control to handle interruptions
• Identify virtual storage components and their elements
• Recognize the method used to translate virtual addresses into real addresses
• Identify the names and purposes of the areas and regions in the MVS address space
• Recognize functions performed by SRM to balance system loads
• Identify how to display and alter message processing facility settings

Course Content

The Program Status Word

PSW Formats
PSW Bits

Interruption Processing

Interruption Processing
Different Interruption Types

Virtual Storage

Virtual Storage Concepts
Address Translation

The MVS Address Space

The MVS Address Space

The System Resources Manager

The System Resources Manager
SRM Functions

z/OS Architecture Mastery Test


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